1. Field of the Invention
This invention relates to input/output (I/O) channels for computer systems and, more particularly, to a method and apparatus for connecting two I/O channels to a single computer system bus.
2. History of the Prior Art
Computer systems have historically been limited by the capacity or data transfer rate of their input/output systems. The ability of computers to accept and utilize data has always been greater than the rate at which data could be input or output. For example, long after computational speeds were far greater than the physical speed at which "IBM" cards could be fed through a card reader and read, those cards and their data-carrying holes were still the industry standard for data input. Today, computer system busses in personal computers can move data around at about 267 MBytes/sec, (hereinafter 267 MBytes/sec) while the industry standard EISA I/O channel, which connects data-inputting peripherals to the computer system bus, operates at only about 33 MBytes/sec (hereinafter, 33 MBytes/sec).
In current systems the EISA I/O channel and the system bus are connected onto one bus while EISA transfers are occurring. In such I/O-bound systems, this can cause dramatic performance degradation. Connecting the 267 MBytes/sec system bus to the 33 MBytes/sec EISA I/O channel wastes over 87% of the system bus bandwidth.
There is a need for systems which are capable of inputting data at a greater rate in order to more efficiently utilize the computational capacity of modern computer systems. If more than one EISA I/O channel could be attached to the system bus, the input rate could be increased, but until now, there has been no method or apparatus to control such multiple EISA channels and determine priorities between competing input signals.
Based upon the foregoing, it should be understood and appreciated that prior art systems in which a single EISA I/O channel and a system bus are connected onto one bus while EISA transfers are occurring are grossly inefficient. This is a major problem of the prior art. It should also be understood and appreciated that any efforts to solve that major problem by attaching more than one EISA I/O channel to the system bus immediately raise complex control issues. It is another problem of the prior art that a satisfactory solution to those complex control issues has not yet been provided.